Prof. Sarita
Assistant Professor
UGC NET qualified in Electronic Science (88) in July 2025 with 93.91 percentile
I am Ms. Sarita, an Assistant Professor at Dronacharya College of Engineering with a strong academic background in Electronic Science. I qualified the UGC NET examination in Electronic Science in July 2025 with a score of 88 marks, securing an impressive 93.91 percentile. My academic journey reflects my dedication to teaching, research, and continuous learning in the field of electronics. I am passionate about imparting conceptual clarity, fostering analytical thinking among students, and contributing meaningfully to academic and research-oriented environments.
Google Scholar ID : https://scholar.google.com/citations?user=_AlyMmgAAAAJ&hl=en
LinkedIn ID : https://www.linkedin.com/in/sarita-gehlawat-8732a639a/
Education
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Masters of Technology in Computer Science & Engineering (June 2013), MDU University, Haryana, India,
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Scored: 83%
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Bachelors of Engineering in Electronics & Communication Engineering (June 2010), MDU University, Haryana, India, Scored: 81%
Experience
Assistant Professor
Dronacharya College of Engineering, Gurgaon
Feb 2024-till now
Assistant Professor
BM Group Of Institutions, Farrukhnagar, Gurgaon
Oct 2022 to Jan 2024
Assistant Professor
BM Group Of Institutions, Farrukhnagar, Gurgaon
Sep 2012 to Sep 2015
Assistant Professor
Savera Group Of Institutions, Farrukhnagar, Gurgaon
Feb 2011 to Jan 2012
Projects Undertaken
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Study of Voice Transmission Through Optical Fiber - Studied how the voice can transmit by using an optical fiber. It transmits high quality audio and the link is virtually impossible for everyone else to tap into.
Internship and Training
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2 months training in Weather Forecasting at Indian Airlines Pvt. Ltd, (June 2008 – Aug 2008)
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2 months training in Networking Layout at Safdarjung Airport, New Delhi, (June 2009 - Aug 2009)
Dissertation
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Reducing Power Dissipation Using Adiabatic Logic
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An Adiabatic process is a process where the total heat or energy in the system remains constant. Research is based on the fact that as circuits gets smaller and faster, their energy dissipation greatly increases. So the main focus of the project is on the selection of any one of the best methodology under adiabatic process and thus reducing the energy dissipation of any complicated circuit design. The methodology chosen is Efficient Charge Recovery Logic (ECRL) , and the circuit is then implemented using this technology, and concluding with comparison with the results of the non-adiabatic one.​
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